Wiki source code of A soft power reset circuit

Last modified by Victor Zhang on 03:56, 28/10/2020
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1 [[Simulation on CircuitJS>>https://www.falstad.com/circuit/circuitjs.html?cct=$+1+0.000005+10.20027730826997+50+5+43%0AR+32+80+32+32+0+0+40+5+0+0+0.5%0Ag+32+288+32+320+0%0Af+-16+240+32+240+32+1.5+0.02%0Aw+32+80+32+112+0%0Aw+32+144+32+176+0%0Ar+-48+128+-48+176+0+10000%0As+-48+128+-112+128+0+1+true%0Ag+-48+176+-48+224+0%0A368+112+176+176+176+0+0%0Af+-16+128+32+128+33+1.5+0.02%0Aw+32+176+32+224+0%0Aw+32+256+32+288+0%0Aw+-16+240+-16+128+0%0Aw+32+176+64+176+0%0Aw+-48+128+-16+128+0%0Aw+32+80+-112+80+0%0Aw+-112+80+-112+128+0%0Aw+288+128+320+128+0%0Aw+368+176+448+176+0%0Aw+320+240+320+128+0%0Aw+368+256+368+288+0%0Aw+368+176+368+224+0%0Af+320+128+368+128+33+1.5+0.02%0A368+448+176+512+176+0+0%0Ag+288+176+288+224+0%0Ar+288+128+288+176+0+10000%0Aw+368+144+368+176+0%0Aw+368+80+368+112+0%0Af+320+240+368+240+32+1.5+0.02%0Ag+368+288+368+320+0%0AR+368+80+368+32+0+0+40+5+0+0+0.5%0Aw+112+256+112+368+0%0Aw+112+368+448+368+0%0Aw+448+368+448+256+0%0A368+112+368+64+368+0+0%0Ad+112+176+112+256+2+default%0Ad+448+176+448+256+2+default%0Aw+-16+240+-160+240+0%0Aw+-160+240+-160+16+0%0Aw+-160+16+144+16+0%0Ar+704+384+704+464+0+10000%0Ag+448+448+448+496+0%0Ac+208+16+144+16+0+1e-7+3.654510440335984e-64%0Aw+272+16+272+128+0%0Aw+272+128+288+128+0%0Aw+208+16+272+16+0%0A368+272+16+272+-48+0+0%0Ad+272+176+272+128+2+default%0Aw+272+176+288+176+0%0Ar+64+176+64+256+0+10000%0Ag+64+256+64+320+0%0Aw+64+176+112+176+0%0Ar+448+368+448+448+0+10000%0AR+560+352+560+304+0+0+40+5+0+0+0.5%0Ag+560+464+560+496+0%0Af+448+368+560+368+33+1.5+0.02%0Aw+560+384+656+384+0%0Ar+560+384+560+464+0+10000%0Af+656+368+704+368+33+1.5+0.02%0Ag+704+464+704+496+0%0AR+704+352+704+304+0+0+40+5+0+0+0.5%0A368+704+384+768+384+0+0%0Aw+656+368+656+384+0%0Ao+49+16+0+4099+5+0.003125+0+2+40+0%0A]]
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3 Background: It might be needed to have a reset pulse with boot code to detect reset and hold
4
5 The circuit uses 4 pMOS and 2 nMOS
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7 The idea is to use or gate and capacitor charging one pin to release the second input for the output to be a low pulse
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9 The 2 pMOS flip on the bottom right side might not be needed, as 4.65v and 4.93v will be both counted as high, so not that important.
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11 [[image:1603828591898-360.png]]

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